Periph ID AIC | Symbol | Description |
---|---|---|
1 | (AT91C_ID_SYS) | System Interrupt |
Signal | Symbol | PIO controller | Description |
---|---|---|---|
PCK1 | (AT91C_PC31_PCK1 ) | PIOC Periph: B Bit: 31 | PMC Programmable clock Output 1 |
PCK1 | (AT91C_PA8_PCK1 ) | PIOA Periph: B Bit: 8 | PMC Programmable clock Output 1 |
PCK2 | (AT91C_PC8_PCK2 ) | PIOC Periph: B Bit: 8 | PMC Programmable clock Output 2 |
PCK2 | (AT91C_PB31_PCK2 ) | PIOB Periph: B Bit: 31 | PMC Programmable clock Output 2 |
PCK2 | (AT91C_PA9_PCK2 ) | PIOA Periph: B Bit: 9 | PMC Programmable clock Output 2 |
PCK3 | (AT91C_PC9_PCK3 ) | PIOC Periph: B Bit: 9 | PMC Programmable clock Output 3 |
PCK3 | (AT91C_PA10_PCK3 ) | PIOA Periph: B Bit: 10 | PMC Programmable clock Output 3 |
PCK0 | (AT91C_PA7_PCK0 ) | PIOA Periph: B Bit: 7 | PMC Programmable clock Output 0 |
PCK0 | (AT91C_PB2_PCK0 ) | PIOB Periph: B Bit: 2 | PMC Programmable clock Output 0 |
Function | Description |
---|---|
AT91F_PMC_CfgPMC | Enable Peripheral clock in PMC for PMC |
AT91F_PMC_CfgPIO | Configure PIO controllers to drive PMC signals |
Offset | Field | Description |
---|---|---|
0x0 | PMC_SCER | System Clock Enable Register |
0x4 | PMC_SCDR | System Clock Disable Register |
0x8 | PMC_SCSR | System Clock Status Register |
0x10 | PMC_PCER | Peripheral Clock Enable Register |
0x14 | PMC_PCDR | Peripheral Clock Disable Register |
0x18 | PMC_PCSR | Peripheral Clock Status Register |
0x20 | PMC_MOR (CKGR_MOR) | Main Oscillator Register |
0x24 | PMC_MCFR (CKGR_MCFR) | Main Clock Frequency Register |
0x28 | PMC_PLLAR (CKGR_PLLAR) | PLL A Register |
0x2C | PMC_PLLBR (CKGR_PLLBR) | PLL B Register |
0x30 | PMC_MCKR | Master Clock Register |
0x40 | PMC_PCKR[8] (PMC_PCKR) | Programmable Clock Register |
0x60 | PMC_IER | Interrupt Enable Register |
0x64 | PMC_IDR | Interrupt Disable Register |
0x68 | PMC_SR | Status Register |
0x6C | PMC_IMR | Interrupt Mask Register |
Function | Description |
---|---|
AT91F_CKGR_CfgPLLB_TransientTime | Cfg PLL oscount field according to the PLL transient time |
AT91F_PMC_GetInterruptMaskStatus | Return PMC Interrupt Mask Status |
AT91F_CKGR_DisableMainOscillator | Disable the main oscillator |
AT91F_CKGR_GetMainOscillatorReg | Cfg the main oscillator |
AT91F_CKGR_GetMainClock | Return Main clock in Hz |
AT91F_PMC_CfgSysClkDisableReg | Configure the System Clock Disable Register of the PMC controller |
AT91F_CKGR_DisablePLLBInput | Disable the PLLB Input |
AT91F_PMC_IsInterruptMasked | Test if PMC Interrupt is Masked |
AT91F_PMC_EnableIt | Enable PMC interrupt |
AT91F_PMC_GetPeriphClock | Get peripheral clock status |
AT91F_CKGR_CfgPLLA_TransientTime | Cfg PLL oscount field according to the PLL transient time |
AT91F_PMC_EnablePCK | Enable peripheral clock |
AT91F_PMC_GetMCKReg | Return Master Clock Register |
AT91F_CKGR_EnableMainOscillator | Enable the main oscillator |
AT91F_CKGR_GetMainClockFreqReg | Cfg the main oscillator |
AT91F_PMC_DisableHCK | Disable AHB peripheral clock |
AT91F_CKGR_CfgPLLAReg | Cfg the PLLA Register |
AT91F_PMC_GetMasterClock | Return master clock in Hz |
AT91F_CKGR_CfgPLLBReg | Cfg the PLLB Register |
AT91F_PMC_GetStatus | Return PMC Interrupt Status |
AT91F_CKGR_CfgMainOscillatorReg | Cfg the main oscillator |
AT91F_CKGR_GetPLLAReg | Get the PLLA Register |
AT91F_CKGR_GetPLLBReg | Get the PLLB Register |
AT91F_PMC_GetProcessorClock | Return processor clock in Hz |
AT91F_CKGR_DisablePLLBOutput | Disable the PLLB output |
AT91F_CKGR_DisablePLLAInput | Disable the PLLA Input |
AT91F_PMC_CfgSysClkEnableReg | Configure the System Clock Enable Register of the PMC controller |
AT91F_PMC_EnablePeriphClock | Enable peripheral clock |
AT91F_PMC_DisablePeriphClock | Disable peripheral clock |
AT91F_PMC_DisablePCK | Enable peripheral clock |
AT91F_PMC_GetSysClkStatusReg | Return the System Clock Status Register of the PMC controller |
AT91F_PMC_IsStatusSet | Test if PMC Status is Set |
AT91F_PMC_DisableIt | Disable PMC interrupt |
AT91F_CKGR_CfgMainOscStartUpTime | Cfg MOR Register according to the main osc startup time |
AT91F_PMC_EnableHCK | Enable AHB peripheral clock |
AT91F_CKGR_DisablePLLAOutput | Disable the PLLA output |
AT91F_CKGR_DisablePLLA | Disable the PLLA input and output for conso reduction |
AT91F_PMC_CfgMCKReg | Cfg Master Clock Register |
AT91F_CKGR_DisablePLLB | Disable the PLLB input and output for conso reduction |
Offset | Name | Description |
---|---|---|
0 | PMC_PCK AT91C_PMC_PCK | Processor Clock 0 = The processor clock is disabled 1 = The processor clock is enabled |
6 | PMC_UHP AT91C_PMC_UHP | USB Host Port Clock 0 = The 12/48 MHz clock of the USB Host Port is disabled. 1 = The 12/48 MHz clock of the USB Host Port is enabled. |
7 | PMC_UDP AT91C_PMC_UDP | USB Device Port Clock 0 = The 48 MHz clock of the USB Device Port is disabled 1 = The 48 MHz clock of the USB Device Port is enabled |
8 | PMC_PCK0 AT91C_PMC_PCK0 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
9 | PMC_PCK1 AT91C_PMC_PCK1 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
10 | PMC_PCK2 AT91C_PMC_PCK2 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
11 | PMC_PCK3 AT91C_PMC_PCK3 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
16 | PMC_HCK0 AT91C_PMC_HCK0 | AHB UHP Clock Output 0 = The corresponding AHB UHP clock output is disabled. 1 = The corresponding AHB UHP clock output is enabled. |
17 | PMC_HCK1 AT91C_PMC_HCK1 | AHB LCDC Clock Output 0 = The corresponding AHB LCDC clock output is disabled. 1 = The corresponding AHB LCDC clock output is enabled. |
Offset | Name | Description |
---|---|---|
0 | PMC_PCK AT91C_PMC_PCK | Processor Clock 0 = The processor clock is disabled 1 = The processor clock is enabled |
6 | PMC_UHP AT91C_PMC_UHP | USB Host Port Clock 0 = The 12/48 MHz clock of the USB Host Port is disabled. 1 = The 12/48 MHz clock of the USB Host Port is enabled. |
7 | PMC_UDP AT91C_PMC_UDP | USB Device Port Clock 0 = The 48 MHz clock of the USB Device Port is disabled 1 = The 48 MHz clock of the USB Device Port is enabled |
8 | PMC_PCK0 AT91C_PMC_PCK0 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
9 | PMC_PCK1 AT91C_PMC_PCK1 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
10 | PMC_PCK2 AT91C_PMC_PCK2 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
11 | PMC_PCK3 AT91C_PMC_PCK3 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
16 | PMC_HCK0 AT91C_PMC_HCK0 | AHB UHP Clock Output 0 = The corresponding AHB UHP clock output is disabled. 1 = The corresponding AHB UHP clock output is enabled. |
17 | PMC_HCK1 AT91C_PMC_HCK1 | AHB LCDC Clock Output 0 = The corresponding AHB LCDC clock output is disabled. 1 = The corresponding AHB LCDC clock output is enabled. |
Offset | Name | Description |
---|---|---|
0 | PMC_PCK AT91C_PMC_PCK | Processor Clock 0 = The processor clock is disabled 1 = The processor clock is enabled |
6 | PMC_UHP AT91C_PMC_UHP | USB Host Port Clock 0 = The 12/48 MHz clock of the USB Host Port is disabled. 1 = The 12/48 MHz clock of the USB Host Port is enabled. |
7 | PMC_UDP AT91C_PMC_UDP | USB Device Port Clock 0 = The 48 MHz clock of the USB Device Port is disabled 1 = The 48 MHz clock of the USB Device Port is enabled |
8 | PMC_PCK0 AT91C_PMC_PCK0 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
9 | PMC_PCK1 AT91C_PMC_PCK1 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
10 | PMC_PCK2 AT91C_PMC_PCK2 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
11 | PMC_PCK3 AT91C_PMC_PCK3 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled. |
16 | PMC_HCK0 AT91C_PMC_HCK0 | AHB UHP Clock Output 0 = The corresponding AHB UHP clock output is disabled. 1 = The corresponding AHB UHP clock output is enabled. |
17 | PMC_HCK1 AT91C_PMC_HCK1 | AHB LCDC Clock Output 0 = The corresponding AHB LCDC clock output is disabled. 1 = The corresponding AHB LCDC clock output is enabled. |
Offset | Name | Description |
---|---|---|
0 | CKGR_MOSCEN AT91C_CKGR_MOSCEN | Main Oscillator Enable 0 = The main oscillator is disabled. 1 = The main oscillator is enabled. OSCBYPASS must be set to 0. |
1 | CKGR_OSCBYPASS AT91C_CKGR_OSCBYPASS | Main Oscillator Bypass 0 = The main oscillator is not bypassed. 1 = The main oscillator is bypassed. MOSCEN bit must be set to 0. |
15..8 | CKGR_OSCOUNT AT91C_CKGR_OSCOUNT | Main Oscillator Start-up Time Specifies the number of slow clock cycles multiplied by 8 for the main oscillator start-up time. |
Offset | Name | Description |
---|---|---|
15..0 | CKGR_MAINF AT91C_CKGR_MAINF | Main Clock Frequency Gives the number of main clock cycles within 16 slow clock periods. |
16 | CKGR_MAINRDY AT91C_CKGR_MAINRDY | Main Clock Ready 0 = FMAIN value is not valid or the main oscillator is disabled. 1 = The main oscillator has been enabled previously and MAINF value is available. |
Offset | Name | Description | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
7..0 | CKGR_DIVA AT91C_CKGR_DIVA | Divider A Selected 2-255 Divider output is the selected clock divided by DIVA
| |||||||||||||||
13..8 | CKGR_PLLACOUNT AT91C_CKGR_PLLACOUNT | PLL A Counter Specifies the number of slow clock cycles before the LOCKA bit is set in PMC_SR after PMC_PLLA is written. | |||||||||||||||
15..14 | CKGR_OUTA AT91C_CKGR_OUTA | PLL A Output Frequency Range
| |||||||||||||||
26..16 | CKGR_MULA AT91C_CKGR_MULA | PLL A Multiplier 0 = The PLL A is deactivated. 1 up to 2047 = The PLL A output frequency is the PLL A input frequency multiplied by MULA + 1. | |||||||||||||||
29 | CKGR_SRCA AT91C_CKGR_SRCA | BE CAREFUL !!! This bit MUST BE SET TO 1. |
Offset | Name | Description | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
7..0 | CKGR_DIVB AT91C_CKGR_DIVB | Divider B Selected 2-255 Divider output is the selected clock divided by DIVB
| |||||||||||||||
13..8 | CKGR_PLLBCOUNT AT91C_CKGR_PLLBCOUNT | PLL B Counter Specifies the number of slow clock cycles before the LOCKB bit is set in PMC_SR after PMC_PLLB is written. | |||||||||||||||
15..14 | CKGR_OUTB AT91C_CKGR_OUTB | PLL B Output Frequency Range
| |||||||||||||||
26..16 | CKGR_MULB AT91C_CKGR_MULB | PLL B Multiplier 0 = The PLL B is deactivated. 1 up to 2047 = The PLL B output frequency is the PLL B input frequency multiplied by MULB + 1. | |||||||||||||||
29..28 | CKGR_USBDIV AT91C_CKGR_USBDIV | Divider for USB Clocks
|
Offset | Name | Description | ||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1..0 | PMC_CSS AT91C_PMC_CSS | Programmable Clock Selection Clock selection
| ||||||||||||||||||||||||
4..2 | PMC_PRES AT91C_PMC_PRES | Programmable Clock Prescaler Master clock
| ||||||||||||||||||||||||
9..8 | PMC_MDIV AT91C_PMC_MDIV | Master Clock Division
|
Offset | Name | Description | ||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1..0 | PMC_CSS AT91C_PMC_CSS | Programmable Clock Selection Clock selection
| ||||||||||||||||||||||||
4..2 | PMC_PRES AT91C_PMC_PRES | Programmable Clock Prescaler Master clock
|
Offset | Name | Description |
---|---|---|
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized. |
1 | PMC_LOCKA AT91C_PMC_LOCKA | PLL A Status/Enable/Disable/Mask 0 = PLLA is not locked. 1 = PLLA is locked. |
2 | PMC_LOCKB AT91C_PMC_LOCKB | PLL B Status/Enable/Disable/Mask 0 = PLLB is not locked. 1 = PLLB is locked. |
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | Master Clock Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on. |
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on. |
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on. |
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on. |
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on. |
Offset | Name | Description |
---|---|---|
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized. |
1 | PMC_LOCKA AT91C_PMC_LOCKA | PLL A Status/Enable/Disable/Mask 0 = PLLA is not locked. 1 = PLLA is locked. |
2 | PMC_LOCKB AT91C_PMC_LOCKB | PLL B Status/Enable/Disable/Mask 0 = PLLB is not locked. 1 = PLLB is locked. |
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | Master Clock Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on. |
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on. |
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on. |
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on. |
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on. |
Offset | Name | Description |
---|---|---|
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized. |
1 | PMC_LOCKA AT91C_PMC_LOCKA | PLL A Status/Enable/Disable/Mask 0 = PLLA is not locked. 1 = PLLA is locked. |
2 | PMC_LOCKB AT91C_PMC_LOCKB | PLL B Status/Enable/Disable/Mask 0 = PLLB is not locked. 1 = PLLB is locked. |
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | Master Clock Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on. |
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on. |
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on. |
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on. |
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on. |
Offset | Name | Description |
---|---|---|
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized. |
1 | PMC_LOCKA AT91C_PMC_LOCKA | PLL A Status/Enable/Disable/Mask 0 = PLLA is not locked. 1 = PLLA is locked. |
2 | PMC_LOCKB AT91C_PMC_LOCKB | PLL B Status/Enable/Disable/Mask 0 = PLLB is not locked. 1 = PLLB is locked. |
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | Master Clock Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on. |
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on. |
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on. |
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on. |
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on. |