Offset | Field | Description |
0x0 | SDRAMC_MR | SDRAM Controller Mode Register |
0x4 | SDRAMC_TR | SDRAM Controller Refresh Timer Register |
0x8 | SDRAMC_CR | SDRAM Controller Configuration Register |
0xC | SDRAMC_HSR | SDRAM Controller High Speed Register |
0x10 | SDRAMC_LPR | SDRAM Controller Low Power Register |
0x14 | SDRAMC_IER | SDRAM Controller Interrupt Enable Register |
0x18 | SDRAMC_IDR | SDRAM Controller Interrupt Disable Register |
0x1C | SDRAMC_IMR | SDRAM Controller Interrupt Mask Register |
0x20 | SDRAMC_ISR | SDRAM Controller Interrupt Mask Register |
0x24 | SDRAMC_MDR | SDRAM Memory Device Register |
0x200 | SMC_SETUP0 (SMC_SETUP) | Setup Register for CS 0 |
0x204 | SMC_PULSE0 (SMC_PULSE) | Pulse Register for CS 0 |
0x208 | SMC_CYCLE0 (SMC_CYC) | Cycle Register for CS 0 |
0x20C | SMC_CTRL0 (SMC_CTRL) | Control Register for CS 0 |
0x210 | SMC_SETUP1 (SMC_SETUP) | Setup Register for CS 1 |
0x214 | SMC_PULSE1 (SMC_PULSE) | Pulse Register for CS 1 |
0x218 | SMC_CYCLE1 (SMC_CYC) | Cycle Register for CS 1 |
0x21C | SMC_CTRL1 (SMC_CTRL) | Control Register for CS 1 |
0x220 | SMC_SETUP2 (SMC_SETUP) | Setup Register for CS 2 |
0x224 | SMC_PULSE2 (SMC_PULSE) | Pulse Register for CS 2 |
0x228 | SMC_CYCLE2 (SMC_CYC) | Cycle Register for CS 2 |
0x22C | SMC_CTRL2 (SMC_CTRL) | Control Register for CS 2 |
0x230 | SMC_SETUP3 (SMC_SETUP) | Setup Register for CS 3 |
0x234 | SMC_PULSE3 (SMC_PULSE) | Pulse Register for CS 3 |
0x238 | SMC_CYCLE3 (SMC_CYC) | Cycle Register for CS 3 |
0x23C | SMC_CTRL3 (SMC_CTRL) | Control Register for CS 3 |
0x240 | SMC_SETUP4 (SMC_SETUP) | Setup Register for CS 4 |
0x244 | SMC_PULSE4 (SMC_PULSE) | Pulse Register for CS 4 |
0x248 | SMC_CYCLE4 (SMC_CYC) | Cycle Register for CS 4 |
0x24C | SMC_CTRL4 (SMC_CTRL) | Control Register for CS 4 |
0x250 | SMC_SETUP5 (SMC_SETUP) | Setup Register for CS 5 |
0x254 | SMC_PULSE5 (SMC_PULSE) | Pulse Register for CS 5 |
0x258 | SMC_CYCLE5 (SMC_CYC) | Cycle Register for CS 5 |
0x25C | SMC_CTRL5 (SMC_CTRL) | Control Register for CS 5 |
0x260 | SMC_SETUP6 (SMC_SETUP) | Setup Register for CS 6 |
0x264 | SMC_PULSE6 (SMC_PULSE) | Pulse Register for CS 6 |
0x268 | SMC_CYCLE6 (SMC_CYC) | Cycle Register for CS 6 |
0x26C | SMC_CTRL6 (SMC_CTRL) | Control Register for CS 6 |
0x270 | SMC_SETUP7 (SMC_SETUP) | Setup Register for CS 7 |
0x274 | SMC_PULSE7 (SMC_PULSE) | Pulse Register for CS 7 |
0x278 | SMC_CYCLE7 (SMC_CYC) | Cycle Register for CS 7 |
0x27C | SMC_CTRL7 (SMC_CTRL) | Control Register for CS 7 |
0x400 | MATRIX_MCFG | Master Configuration Register |
0x404 | MATRIX_SCFG0 | Slave Configuration Register 0 |
0x408 | MATRIX_SCFG1 | Slave Configuration Register 1 |
0x40C | MATRIX_SCFG2 | Slave Configuration Register 2 |
0x410 | MATRIX_SCFG3 | Slave Configuration Register 3 |
0x414 | MATRIX_SCFG4 | Slave Configuration Register 4 |
0x424 | MATRIX_TCMR | Slave 0 Special Function Register |
0x430 | MATRIX_EBICSA | Slave 3 Special Function Register |
0x434 | MATRIX_USBPCR | Slave 4 Special Function Register |
0x444 | MATRIX_VERSION | Version Register |
0x600 | AIC_SMR[32] (AIC_SMR) | Source Mode Register |
0x680 | AIC_SVR[32] (AIC_SVR) | Source Vector Register |
0x700 | AIC_IVR | IRQ Vector Register |
0x704 | AIC_FVR | FIQ Vector Register |
0x708 | AIC_ISR | Interrupt Status Register |
0x70C | AIC_IPR | Interrupt Pending Register |
0x710 | AIC_IMR | Interrupt Mask Register |
0x714 | AIC_CISR | Core Interrupt Status Register |
0x720 | AIC_IECR | Interrupt Enable Command Register |
0x724 | AIC_IDCR | Interrupt Disable Command Register |
0x728 | AIC_ICCR | Interrupt Clear Command Register |
0x72C | AIC_ISCR | Interrupt Set Command Register |
0x730 | AIC_EOICR | End of Interrupt Command Register |
0x734 | AIC_SPU | Spurious Vector Register |
0x738 | AIC_DCR | Debug Control Register (Protect) |
0x740 | AIC_FFER | Fast Forcing Enable Register |
0x744 | AIC_FFDR | Fast Forcing Disable Register |
0x748 | AIC_FFSR | Fast Forcing Status Register |
0x800 | DBGU_CR | Control Register |
0x804 | DBGU_MR | Mode Register |
0x808 | DBGU_IER | Interrupt Enable Register |
0x80C | DBGU_IDR | Interrupt Disable Register |
0x810 | DBGU_IMR | Interrupt Mask Register |
0x814 | DBGU_CSR | Channel Status Register |
0x818 | DBGU_RHR | Receiver Holding Register |
0x81C | DBGU_THR | Transmitter Holding Register |
0x820 | DBGU_BRGR | Baud Rate Generator Register |
0x840 | DBGU_CIDR | Chip ID Register |
0x844 | DBGU_EXID | Chip ID Extension Register |
0x848 | DBGU_FNTR | Force NTRST Register |
0x900 | DBGU_RPR (PDC_RPR) | Receive Pointer Register |
0x904 | DBGU_RCR (PDC_RCR) | Receive Counter Register |
0x908 | DBGU_TPR (PDC_TPR) | Transmit Pointer Register |
0x90C | DBGU_TCR (PDC_TCR) | Transmit Counter Register |
0x910 | DBGU_RNPR (PDC_RNPR) | Receive Next Pointer Register |
0x914 | DBGU_RNCR (PDC_RNCR) | Receive Next Counter Register |
0x918 | DBGU_TNPR (PDC_TNPR) | Transmit Next Pointer Register |
0x91C | DBGU_TNCR (PDC_TNCR) | Transmit Next Counter Register |
0x920 | DBGU_PTCR (PDC_PTCR) | PDC Transfer Control Register |
0x924 | DBGU_PTSR (PDC_PTSR) | PDC Transfer Status Register |
0xA00 | PIOA_PER (PIO_PER) | PIO Enable Register |
0xA04 | PIOA_PDR (PIO_PDR) | PIO Disable Register |
0xA08 | PIOA_PSR (PIO_PSR) | PIO Status Register |
0xA10 | PIOA_OER (PIO_OER) | Output Enable Register |
0xA14 | PIOA_ODR (PIO_ODR) | Output Disable Registerr |
0xA18 | PIOA_OSR (PIO_OSR) | Output Status Register |
0xA20 | PIOA_IFER (PIO_IFER) | Input Filter Enable Register |
0xA24 | PIOA_IFDR (PIO_IFDR) | Input Filter Disable Register |
0xA28 | PIOA_IFSR (PIO_IFSR) | Input Filter Status Register |
0xA30 | PIOA_SODR (PIO_SODR) | Set Output Data Register |
0xA34 | PIOA_CODR (PIO_CODR) | Clear Output Data Register |
0xA38 | PIOA_ODSR (PIO_ODSR) | Output Data Status Register |
0xA3C | PIOA_PDSR (PIO_PDSR) | Pin Data Status Register |
0xA40 | PIOA_IER (PIO_IER) | Interrupt Enable Register |
0xA44 | PIOA_IDR (PIO_IDR) | Interrupt Disable Register |
0xA48 | PIOA_IMR (PIO_IMR) | Interrupt Mask Register |
0xA4C | PIOA_ISR (PIO_ISR) | Interrupt Status Register |
0xA50 | PIOA_MDER (PIO_MDER) | Multi-driver Enable Register |
0xA54 | PIOA_MDDR (PIO_MDDR) | Multi-driver Disable Register |
0xA58 | PIOA_MDSR (PIO_MDSR) | Multi-driver Status Register |
0xA60 | PIOA_PPUDR (PIO_PPUDR) | Pull-up Disable Register |
0xA64 | PIOA_PPUER (PIO_PPUER) | Pull-up Enable Register |
0xA68 | PIOA_PPUSR (PIO_PPUSR) | Pull-up Status Register |
0xA70 | PIOA_ASR (PIO_ASR) | Select A Register |
0xA74 | PIOA_BSR (PIO_BSR) | Select B Register |
0xA78 | PIOA_ABSR (PIO_ABSR) | AB Select Status Register |
0xAA0 | PIOA_OWER (PIO_OWER) | Output Write Enable Register |
0xAA4 | PIOA_OWDR (PIO_OWDR) | Output Write Disable Register |
0xAA8 | PIOA_OWSR (PIO_OWSR) | Output Write Status Register |
0xC00 | PIOB_PER (PIO_PER) | PIO Enable Register |
0xC04 | PIOB_PDR (PIO_PDR) | PIO Disable Register |
0xC08 | PIOB_PSR (PIO_PSR) | PIO Status Register |
0xC10 | PIOB_OER (PIO_OER) | Output Enable Register |
0xC14 | PIOB_ODR (PIO_ODR) | Output Disable Registerr |
0xC18 | PIOB_OSR (PIO_OSR) | Output Status Register |
0xC20 | PIOB_IFER (PIO_IFER) | Input Filter Enable Register |
0xC24 | PIOB_IFDR (PIO_IFDR) | Input Filter Disable Register |
0xC28 | PIOB_IFSR (PIO_IFSR) | Input Filter Status Register |
0xC30 | PIOB_SODR (PIO_SODR) | Set Output Data Register |
0xC34 | PIOB_CODR (PIO_CODR) | Clear Output Data Register |
0xC38 | PIOB_ODSR (PIO_ODSR) | Output Data Status Register |
0xC3C | PIOB_PDSR (PIO_PDSR) | Pin Data Status Register |
0xC40 | PIOB_IER (PIO_IER) | Interrupt Enable Register |
0xC44 | PIOB_IDR (PIO_IDR) | Interrupt Disable Register |
0xC48 | PIOB_IMR (PIO_IMR) | Interrupt Mask Register |
0xC4C | PIOB_ISR (PIO_ISR) | Interrupt Status Register |
0xC50 | PIOB_MDER (PIO_MDER) | Multi-driver Enable Register |
0xC54 | PIOB_MDDR (PIO_MDDR) | Multi-driver Disable Register |
0xC58 | PIOB_MDSR (PIO_MDSR) | Multi-driver Status Register |
0xC60 | PIOB_PPUDR (PIO_PPUDR) | Pull-up Disable Register |
0xC64 | PIOB_PPUER (PIO_PPUER) | Pull-up Enable Register |
0xC68 | PIOB_PPUSR (PIO_PPUSR) | Pull-up Status Register |
0xC70 | PIOB_ASR (PIO_ASR) | Select A Register |
0xC74 | PIOB_BSR (PIO_BSR) | Select B Register |
0xC78 | PIOB_ABSR (PIO_ABSR) | AB Select Status Register |
0xCA0 | PIOB_OWER (PIO_OWER) | Output Write Enable Register |
0xCA4 | PIOB_OWDR (PIO_OWDR) | Output Write Disable Register |
0xCA8 | PIOB_OWSR (PIO_OWSR) | Output Write Status Register |
0xE00 | PIOC_PER (PIO_PER) | PIO Enable Register |
0xE04 | PIOC_PDR (PIO_PDR) | PIO Disable Register |
0xE08 | PIOC_PSR (PIO_PSR) | PIO Status Register |
0xE10 | PIOC_OER (PIO_OER) | Output Enable Register |
0xE14 | PIOC_ODR (PIO_ODR) | Output Disable Registerr |
0xE18 | PIOC_OSR (PIO_OSR) | Output Status Register |
0xE20 | PIOC_IFER (PIO_IFER) | Input Filter Enable Register |
0xE24 | PIOC_IFDR (PIO_IFDR) | Input Filter Disable Register |
0xE28 | PIOC_IFSR (PIO_IFSR) | Input Filter Status Register |
0xE30 | PIOC_SODR (PIO_SODR) | Set Output Data Register |
0xE34 | PIOC_CODR (PIO_CODR) | Clear Output Data Register |
0xE38 | PIOC_ODSR (PIO_ODSR) | Output Data Status Register |
0xE3C | PIOC_PDSR (PIO_PDSR) | Pin Data Status Register |
0xE40 | PIOC_IER (PIO_IER) | Interrupt Enable Register |
0xE44 | PIOC_IDR (PIO_IDR) | Interrupt Disable Register |
0xE48 | PIOC_IMR (PIO_IMR) | Interrupt Mask Register |
0xE4C | PIOC_ISR (PIO_ISR) | Interrupt Status Register |
0xE50 | PIOC_MDER (PIO_MDER) | Multi-driver Enable Register |
0xE54 | PIOC_MDDR (PIO_MDDR) | Multi-driver Disable Register |
0xE58 | PIOC_MDSR (PIO_MDSR) | Multi-driver Status Register |
0xE60 | PIOC_PPUDR (PIO_PPUDR) | Pull-up Disable Register |
0xE64 | PIOC_PPUER (PIO_PPUER) | Pull-up Enable Register |
0xE68 | PIOC_PPUSR (PIO_PPUSR) | Pull-up Status Register |
0xE70 | PIOC_ASR (PIO_ASR) | Select A Register |
0xE74 | PIOC_BSR (PIO_BSR) | Select B Register |
0xE78 | PIOC_ABSR (PIO_ABSR) | AB Select Status Register |
0xEA0 | PIOC_OWER (PIO_OWER) | Output Write Enable Register |
0xEA4 | PIOC_OWDR (PIO_OWDR) | Output Write Disable Register |
0xEA8 | PIOC_OWSR (PIO_OWSR) | Output Write Status Register |
0x1200 | PMC_SCER | System Clock Enable Register |
0x1204 | PMC_SCDR | System Clock Disable Register |
0x1208 | PMC_SCSR | System Clock Status Register |
0x1210 | PMC_PCER | Peripheral Clock Enable Register |
0x1214 | PMC_PCDR | Peripheral Clock Disable Register |
0x1218 | PMC_PCSR | Peripheral Clock Status Register |
0x1220 | PMC_MOR (CKGR_MOR) | Main Oscillator Register |
0x1224 | PMC_MCFR (CKGR_MCFR) | Main Clock Frequency Register |
0x1228 | PMC_PLLAR (CKGR_PLLAR) | PLL A Register |
0x122C | PMC_PLLBR (CKGR_PLLBR) | PLL B Register |
0x1230 | PMC_MCKR | Master Clock Register |
0x1240 | PMC_PCKR[8] (PMC_PCKR) | Programmable Clock Register |
0x1260 | PMC_IER | Interrupt Enable Register |
0x1264 | PMC_IDR | Interrupt Disable Register |
0x1268 | PMC_SR | Status Register |
0x126C | PMC_IMR | Interrupt Mask Register |
0x1300 | RSTC_RCR | Reset Control Register |
0x1304 | RSTC_RSR | Reset Status Register |
0x1308 | RSTC_RMR | Reset Mode Register |
0x1310 | SHDWC_SHCR | Shut Down Control Register |
0x1314 | SHDWC_SHMR | Shut Down Mode Register |
0x1318 | SHDWC_SHSR | Shut Down Status Register |
0x1320 | RTTC_RTMR | Real-time Mode Register |
0x1324 | RTTC_RTAR | Real-time Alarm Register |
0x1328 | RTTC_RTVR | Real-time Value Register |
0x132C | RTTC_RTSR | Real-time Status Register |
0x1330 | PITC_PIMR | Period Interval Mode Register |
0x1334 | PITC_PISR | Period Interval Status Register |
0x1338 | PITC_PIVR | Period Interval Value Register |
0x133C | PITC_PIIR | Period Interval Image Register |
0x1340 | WDTC_WDCR | Watchdog Control Register |
0x1344 | WDTC_WDMR | Watchdog Mode Register |
0x1348 | WDTC_WDSR | Watchdog Status Register |
0x1350 | SYS_GPBR0 (GPBR) | General Purpose Register 0 |
0x1354 | SYS_GPBR1 (GPBR) | General Purpose Register 1 |
0x1358 | SYS_GPBR2 (GPBR) | General Purpose Register 2 |
0x135C | SYS_GPBR3 (GPBR) | General Purpose Register 3 |