Multimedia Card Interface Peripheral

MCI (AT91S_MCI) 0xFFFA8000 (AT91C_BASE_MCI)
Periph ID AICSymbolDescription
9 (AT91C_ID_MCI)Multimedia Card Interface

SignalSymbolPIO controllerDescription
MCDA3(AT91C_PA6_MCDA3 )PIOA Periph: B Bit: 6Multimedia Card A Data 3
MCCDA(AT91C_PA1_MCCDA )PIOA Periph: B Bit: 1Multimedia Card A Command
MCDA0(AT91C_PA0_MCDA0 )PIOA Periph: B Bit: 0Multimedia Card A Data 0
MCDA1(AT91C_PA4_MCDA1 )PIOA Periph: B Bit: 4Multimedia Card A Data 1
MCCK(AT91C_PA2_MCCK )PIOA Periph: B Bit: 2Multimedia Card Clock
MCDA2(AT91C_PA5_MCDA2 )PIOA Periph: B Bit: 5Multimedia Card A Data 2

FunctionDescription
AT91F_MCI_CfgPMCEnable Peripheral clock in PMC for MCI
AT91F_MCI_CfgPIOConfigure PIO controllers to drive MCI signals


MCI Software API (AT91S_MCI)

OffsetFieldDescription
0x0MCI_CRMCI Control Register
0x4MCI_MRMCI Mode Register
0x8MCI_DTORMCI Data Timeout Register
0xCMCI_SDCRMCI SD Card Register
0x10MCI_ARGRMCI Argument Register
0x14MCI_CMDRMCI Command Register
0x20MCI_RSPR[4] (MCI_RSPR)MCI Response Register
0x30MCI_RDRMCI Receive Data Register
0x34MCI_TDRMCI Transmit Data Register
0x40MCI_SRMCI Status Register
0x44MCI_IERMCI Interrupt Enable Register
0x48MCI_IDRMCI Interrupt Disable Register
0x4CMCI_IMRMCI Interrupt Mask Register
0x100MCI_RPR (PDC_RPR)Receive Pointer Register
0x104MCI_RCR (PDC_RCR)Receive Counter Register
0x108MCI_TPR (PDC_TPR)Transmit Pointer Register
0x10CMCI_TCR (PDC_TCR)Transmit Counter Register
0x110MCI_RNPR (PDC_RNPR)Receive Next Pointer Register
0x114MCI_RNCR (PDC_RNCR)Receive Next Counter Register
0x118MCI_TNPR (PDC_TNPR)Transmit Next Pointer Register
0x11CMCI_TNCR (PDC_TNCR)Transmit Next Counter Register
0x120MCI_PTCR (PDC_PTCR)PDC Transfer Control Register
0x124MCI_PTSR (PDC_PTSR)PDC Transfer Status Register

FunctionDescription
AT91F_MCI_GetStatusReturn MCI Interrupt Status
AT91F_MCI_GetDataTimeOutRegReturn the Data TimeOut Register of the MCI controller value
AT91F_MCI_ConfigureConfigure the MCI
AT91F_MCI_CfgModeRegConfigure the Mode Register of the MCI controller
AT91F_MCI_EnableEnable the MCI Interface
AT91F_MCI_GetInterruptMaskStatusReturn MCI Interrupt Mask Status
AT91F_MCI_CfgDataTimeOutRegConfigure the Data TimeOut Register of the MCI controller
AT91F_MCI_GetARGRegReturn the Command ARGUMENT Register of the MCI controller value
AT91F_MCI_GetRSP0RegReturn the RESPONSE Register 0 of the MCI controller value
AT91F_MCI_GetModeRegReturn the Mode Register of the MCI controller value
AT91F_MCI_IsStatusSetTest if MCI Status is Set
AT91F_MCI_SW_ResetReset the MCI Interface
AT91F_MCI_GetRSP1RegReturn the RESPONSE Register 1 of the MCI controller value
AT91F_MCI_DisableDisable the MCI Interface
AT91F_MCI_CfgARGRegConfigure the Command ARGUMENT Register of the MCI controller
AT91F_MCI_CfgSDCardRegConfigure the SDCard Register of the MCI controller
AT91F_MCI_GetRSP2RegReturn the RESPONSE Register 2 of the MCI controller value
AT91F_MCI_CfgFrequencyConfigure the frequency MCCK of the MCI controller
AT91F_MCI_IsInterruptMaskedTest if MCI Interrupt is Masked
AT91F_MCI_EnableItEnable MCI IT
AT91F_MCI_GetRSP3RegReturn the RESPONSE Register 3 of the MCI controller value
AT91F_MCI_CfgCMDRegConfigure the COMMAND Register of the MCI controller
AT91F_MCI_GetSDCardRegReturn the SDCard Register of the MCI controller value
AT91F_MCI_DisableItDisable MCI IT

MCI Register Description

MCI: AT91_REG MCI_CR MCI Control Register

OffsetNameDescription
0MCI_MCIEN
AT91C_MCI_MCIEN
Multimedia Interface Enable
0: No effect.
1: Enables the MultiMedia Interface if MCIDIS is 0.
1MCI_MCIDIS
AT91C_MCI_MCIDIS
Multimedia Interface Disable
0: No effect.
1: Disables the MultiMedia Interface.
2MCI_PWSEN
AT91C_MCI_PWSEN
Power Save Mode Enable
0: No effect.
1: Enables the Power-saving mode if PWSDIS is 0.
3MCI_PWSDIS
AT91C_MCI_PWSDIS
Power Save Mode Disable
0: No effect.
1: Disables the Power-saving mode.
7MCI_SWRST
AT91C_MCI_SWRST
MCI Software reset
0 = No effect.
1 = Resets the MCI.
A software triggered hardware reset of the MCI interface is performed.

MCI: AT91_REG MCI_MR MCI Mode Register

OffsetNameDescription
7..0MCI_CLKDIV
AT91C_MCI_CLKDIV
Clock Divider
MultiMedia Card Interface clock is Master Clock (MCK) divided by (2*(CLKDIV+1)).
10..8MCI_PWSDIV
AT91C_MCI_PWSDIV
Power Saving Divider
MultiMedia Card Interface clock is divided by 2 power PWSDIV when entering Power-saving mode. If PWSDIV is 0x00 then MultiMedia Card Interface clock is stopped when entering Power-saving mode.
14MCI_PDCPADV
AT91C_MCI_PDCPADV
PDC Padding Value
0: 0x00 value is used when padding data in PDC write transfer (non-multiple block size PDC write)
1: 0xFF value is used when padding data in PDC write transfer (non-multiple block size PDC write)
15MCI_PDCMODE
AT91C_MCI_PDCMODE
PDC Oriented Mode
0: Disables PDC transfer
1: Enables PDC transfer
29..18MCI_BLKLEN
AT91C_MCI_BLKLEN
Data Block Length
This field determines the size of the data block that is a multiple of four bytes. Therefore, bits 16 and 17 must be 0.

MCI: AT91_REG MCI_DTOR MCI Data Timeout Register

OffsetNameDescription
3..0MCI_DTOCYC
AT91C_MCI_DTOCYC
Data Timeout Cycle Number
6..4MCI_DTOMUL
AT91C_MCI_DTOMUL
Data Timeout Multiplier
These fields determine the maximum number of clock cycles that the MCI waits between 2 data block transfers. It equals (DTOCYC x Multiplier).
ValueLabelDescription
0MCI_DTOMUL_1
AT91C_MCI_DTOMUL_1

DTOCYC x 1
1MCI_DTOMUL_16
AT91C_MCI_DTOMUL_16

DTOCYC x 16
2MCI_DTOMUL_128
AT91C_MCI_DTOMUL_128

DTOCYC x 128
3MCI_DTOMUL_256
AT91C_MCI_DTOMUL_256

DTOCYC x 256
4MCI_DTOMUL_1024
AT91C_MCI_DTOMUL_1024

DTOCYC x 1024
5MCI_DTOMUL_4096
AT91C_MCI_DTOMUL_4096

DTOCYC x 4096
6MCI_DTOMUL_65536
AT91C_MCI_DTOMUL_65536

DTOCYC x 65536
7MCI_DTOMUL_1048576
AT91C_MCI_DTOMUL_1048576

DTOCYC x 1048576

MCI: AT91_REG MCI_SDCR MCI SD Card Register

OffsetNameDescription
3..0MCI_SCDSEL
AT91C_MCI_SCDSEL
SD Card Selector
0: SD card A selected
1: SD card B selected
7MCI_SCDBUS
AT91C_MCI_SCDBUS
SD Card Bus Width
0: 1-bit data bus
1: 4-bit data bus

MCI: AT91_REG MCI_ARGR MCI Argument Register


Command Argument

MCI: AT91_REG MCI_CMDR MCI Command Register


This register is write-protected while CMDRDY is 0 in MCI_SR. This means that the current command execution cannot be interrupted or modified.
OffsetNameDescription
5..0MCI_CMDNB
AT91C_MCI_CMDNB
Command Number
7..6MCI_RSPTYP
AT91C_MCI_RSPTYP
Response Type
ValueLabelDescription
0MCI_RSPTYP_NO
AT91C_MCI_RSPTYP_NO

No response
1MCI_RSPTYP_48
AT91C_MCI_RSPTYP_48

48-bit response
2MCI_RSPTYP_136
AT91C_MCI_RSPTYP_136

136-bit response
10..8MCI_SPCMD
AT91C_MCI_SPCMD
Special CMD
ValueLabelDescription
0MCI_SPCMD_NONE
AT91C_MCI_SPCMD_NONE

Not a special CMD
1MCI_SPCMD_INIT
AT91C_MCI_SPCMD_INIT

Initialization CMD
2MCI_SPCMD_SYNC
AT91C_MCI_SPCMD_SYNC

Synchronized CMD
4MCI_SPCMD_IT_CMD
AT91C_MCI_SPCMD_IT_CMD

Interrupt command
5MCI_SPCMD_IT_REP
AT91C_MCI_SPCMD_IT_REP

Interrupt response
11MCI_OPDCMD
AT91C_MCI_OPDCMD
Open Drain Command
0: Push/pull command
1: Open drain command
12MCI_MAXLAT
AT91C_MCI_MAXLAT
Maximum Latency for Command to respond
0: 5 cycles maximum latency
1: 64 cycles maximum latency
17..16MCI_TRCMD
AT91C_MCI_TRCMD
Transfer CMD
ValueLabelDescription
0MCI_TRCMD_NO
AT91C_MCI_TRCMD_NO

No transfer
1MCI_TRCMD_START
AT91C_MCI_TRCMD_START

Start transfer
2MCI_TRCMD_STOP
AT91C_MCI_TRCMD_STOP

Stop transfer
18MCI_TRDIR
AT91C_MCI_TRDIR
Transfer Direction
0: Write
1: Read
20..19MCI_TRTYP
AT91C_MCI_TRTYP
Transfer Type
ValueLabelDescription
0MCI_TRTYP_BLOCK
AT91C_MCI_TRTYP_BLOCK

Block Transfer type
1MCI_TRTYP_MULTIPLE
AT91C_MCI_TRTYP_MULTIPLE

Multiple Block transfer type
2MCI_TRTYP_STREAM
AT91C_MCI_TRTYP_STREAM

Stream transfer type

MCI: AT91_REG MCI_RSPR MCI Response Register


Response

MCI: AT91_REG MCI_RDR MCI Receive Data Register


Data to read

MCI: AT91_REG MCI_TDR MCI Transmit Data Register


Data to write

MCI: AT91_REG MCI_SR MCI Status Register

OffsetNameDescription
0MCI_CMDRDY
AT91C_MCI_CMDRDY
Command Ready flag
1MCI_RXRDY
AT91C_MCI_RXRDY
RX Ready flag
2MCI_TXRDY
AT91C_MCI_TXRDY
TX Ready flag
3MCI_BLKE
AT91C_MCI_BLKE
Data Block Transfer Ended flag
4MCI_DTIP
AT91C_MCI_DTIP
Data Transfer in Progress flag
5MCI_NOTBUSY
AT91C_MCI_NOTBUSY
Data Line Not Busy flag
6MCI_ENDRX
AT91C_MCI_ENDRX
End of RX Buffer flag
7MCI_ENDTX
AT91C_MCI_ENDTX
End of TX Buffer flag
14MCI_RXBUFF
AT91C_MCI_RXBUFF
RX Buffer Full flag
15MCI_TXBUFE
AT91C_MCI_TXBUFE
TX Buffer Empty flag
16MCI_RINDE
AT91C_MCI_RINDE
Response Index Error flag
17MCI_RDIRE
AT91C_MCI_RDIRE
Response Direction Error flag
18MCI_RCRCE
AT91C_MCI_RCRCE
Response CRC Error flag
19MCI_RENDE
AT91C_MCI_RENDE
Response End Bit Error flag
20MCI_RTOE
AT91C_MCI_RTOE
Response Time-out Error flag
21MCI_DCRCE
AT91C_MCI_DCRCE
data CRC Error flag
22MCI_DTOE
AT91C_MCI_DTOE
Data timeout Error flag
30MCI_OVRE
AT91C_MCI_OVRE
Overrun flag
31MCI_UNRE
AT91C_MCI_UNRE
Underrun flag

MCI: AT91_REG MCI_IER MCI Interrupt Enable Register

OffsetNameDescription
0MCI_CMDRDY
AT91C_MCI_CMDRDY
Command Ready flag
1MCI_RXRDY
AT91C_MCI_RXRDY
RX Ready flag
2MCI_TXRDY
AT91C_MCI_TXRDY
TX Ready flag
3MCI_BLKE
AT91C_MCI_BLKE
Data Block Transfer Ended flag
4MCI_DTIP
AT91C_MCI_DTIP
Data Transfer in Progress flag
5MCI_NOTBUSY
AT91C_MCI_NOTBUSY
Data Line Not Busy flag
6MCI_ENDRX
AT91C_MCI_ENDRX
End of RX Buffer flag
7MCI_ENDTX
AT91C_MCI_ENDTX
End of TX Buffer flag
14MCI_RXBUFF
AT91C_MCI_RXBUFF
RX Buffer Full flag
15MCI_TXBUFE
AT91C_MCI_TXBUFE
TX Buffer Empty flag
16MCI_RINDE
AT91C_MCI_RINDE
Response Index Error flag
17MCI_RDIRE
AT91C_MCI_RDIRE
Response Direction Error flag
18MCI_RCRCE
AT91C_MCI_RCRCE
Response CRC Error flag
19MCI_RENDE
AT91C_MCI_RENDE
Response End Bit Error flag
20MCI_RTOE
AT91C_MCI_RTOE
Response Time-out Error flag
21MCI_DCRCE
AT91C_MCI_DCRCE
data CRC Error flag
22MCI_DTOE
AT91C_MCI_DTOE
Data timeout Error flag
30MCI_OVRE
AT91C_MCI_OVRE
Overrun flag
31MCI_UNRE
AT91C_MCI_UNRE
Underrun flag

MCI: AT91_REG MCI_IDR MCI Interrupt Disable Register

OffsetNameDescription
0MCI_CMDRDY
AT91C_MCI_CMDRDY
Command Ready flag
1MCI_RXRDY
AT91C_MCI_RXRDY
RX Ready flag
2MCI_TXRDY
AT91C_MCI_TXRDY
TX Ready flag
3MCI_BLKE
AT91C_MCI_BLKE
Data Block Transfer Ended flag
4MCI_DTIP
AT91C_MCI_DTIP
Data Transfer in Progress flag
5MCI_NOTBUSY
AT91C_MCI_NOTBUSY
Data Line Not Busy flag
6MCI_ENDRX
AT91C_MCI_ENDRX
End of RX Buffer flag
7MCI_ENDTX
AT91C_MCI_ENDTX
End of TX Buffer flag
14MCI_RXBUFF
AT91C_MCI_RXBUFF
RX Buffer Full flag
15MCI_TXBUFE
AT91C_MCI_TXBUFE
TX Buffer Empty flag
16MCI_RINDE
AT91C_MCI_RINDE
Response Index Error flag
17MCI_RDIRE
AT91C_MCI_RDIRE
Response Direction Error flag
18MCI_RCRCE
AT91C_MCI_RCRCE
Response CRC Error flag
19MCI_RENDE
AT91C_MCI_RENDE
Response End Bit Error flag
20MCI_RTOE
AT91C_MCI_RTOE
Response Time-out Error flag
21MCI_DCRCE
AT91C_MCI_DCRCE
data CRC Error flag
22MCI_DTOE
AT91C_MCI_DTOE
Data timeout Error flag
30MCI_OVRE
AT91C_MCI_OVRE
Overrun flag
31MCI_UNRE
AT91C_MCI_UNRE
Underrun flag

MCI: AT91_REG MCI_IMR MCI Interrupt Mask Register

OffsetNameDescription
0MCI_CMDRDY
AT91C_MCI_CMDRDY
Command Ready flag
1MCI_RXRDY
AT91C_MCI_RXRDY
RX Ready flag
2MCI_TXRDY
AT91C_MCI_TXRDY
TX Ready flag
3MCI_BLKE
AT91C_MCI_BLKE
Data Block Transfer Ended flag
4MCI_DTIP
AT91C_MCI_DTIP
Data Transfer in Progress flag
5MCI_NOTBUSY
AT91C_MCI_NOTBUSY
Data Line Not Busy flag
6MCI_ENDRX
AT91C_MCI_ENDRX
End of RX Buffer flag
7MCI_ENDTX
AT91C_MCI_ENDTX
End of TX Buffer flag
14MCI_RXBUFF
AT91C_MCI_RXBUFF
RX Buffer Full flag
15MCI_TXBUFE
AT91C_MCI_TXBUFE
TX Buffer Empty flag
16MCI_RINDE
AT91C_MCI_RINDE
Response Index Error flag
17MCI_RDIRE
AT91C_MCI_RDIRE
Response Direction Error flag
18MCI_RCRCE
AT91C_MCI_RCRCE
Response CRC Error flag
19MCI_RENDE
AT91C_MCI_RENDE
Response End Bit Error flag
20MCI_RTOE
AT91C_MCI_RTOE
Response Time-out Error flag
21MCI_DCRCE
AT91C_MCI_DCRCE
data CRC Error flag
22MCI_DTOE
AT91C_MCI_DTOE
Data timeout Error flag
30MCI_OVRE
AT91C_MCI_OVRE
Overrun flag
31MCI_UNRE
AT91C_MCI_UNRE
Underrun flag

MCI: AT91S_PDC MCI PDC interface