Periph ID AIC | Symbol | Description |
---|---|---|
21 | (AT91C_ID_LCDC) | LCD Controller |
Signal | Symbol | PIO controller | Description |
---|---|---|---|
LCDVSYNC | (AT91C_PB0_LCDVSYNC) | PIOB Periph: A Bit: 0 | LCD Vertical Synchronization |
LCDCC | (AT91C_PB4_LCDCC ) | PIOB Periph: A Bit: 4 | LCD Contrast Control |
LCDD10 | (AT91C_PB15_LCDD10 ) | PIOB Periph: A Bit: 15 | LCD Data Bus Bit 10 |
LCDD11 | (AT91C_PB16_LCDD11 ) | PIOB Periph: A Bit: 16 | LCD Data Bus Bit 11 |
LCDD12 | (AT91C_PB17_LCDD12 ) | PIOB Periph: A Bit: 17 | LCD Data Bus Bit 12 |
LCDD20 | (AT91C_PB25_LCDD20 ) | PIOB Periph: B Bit: 25 | LCD Data Bus Bit 20 |
LCDD13 | (AT91C_PB18_LCDD13 ) | PIOB Periph: A Bit: 18 | LCD Data Bus Bit 13 |
LCDD21 | (AT91C_PB26_LCDD21 ) | PIOB Periph: B Bit: 26 | LCD Data Bus Bit 21 |
LCDD14 | (AT91C_PB19_LCDD14 ) | PIOB Periph: A Bit: 19 | LCD Data Bus Bit 14 |
LCDD22 | (AT91C_PB27_LCDD22 ) | PIOB Periph: B Bit: 27 | LCD Data Bus Bit 22 |
LCDD15 | (AT91C_PB20_LCDD15 ) | PIOB Periph: A Bit: 20 | LCD Data Bus Bit 15 |
LCDD23 | (AT91C_PB28_LCDD23 ) | PIOB Periph: B Bit: 28 | LCD Data Bus Bit 23 |
LCDD0 | (AT91C_PB5_LCDD0 ) | PIOB Periph: A Bit: 5 | LCD Data Bus Bit 0 |
LCDD16 | (AT91C_PB21_LCDD16 ) | PIOB Periph: B Bit: 21 | LCD Data Bus Bit 16 |
LCDD1 | (AT91C_PB6_LCDD1 ) | PIOB Periph: A Bit: 6 | LCD Data Bus Bit 1 |
LCDD17 | (AT91C_PB22_LCDD17 ) | PIOB Periph: B Bit: 22 | LCD Data Bus Bit 17 |
LCDD2 | (AT91C_PB4_LCDD2 ) | PIOB Periph: B Bit: 4 | LCD Data Bus Bit 2 |
LCDD2 | (AT91C_PB7_LCDD2 ) | PIOB Periph: A Bit: 7 | LCD Data Bus Bit 2 |
LCDDEN | (AT91C_PB3_LCDDEN ) | PIOB Periph: A Bit: 3 | LCD Data Enable |
LCDD3 | (AT91C_PB8_LCDD3 ) | PIOB Periph: A Bit: 8 | LCD Data Bus Bit 3 |
LCDD18 | (AT91C_PB23_LCDD18 ) | PIOB Periph: B Bit: 23 | LCD Data Bus Bit 18 |
LCDD4 | (AT91C_PB9_LCDD4 ) | PIOB Periph: A Bit: 9 | LCD Data Bus Bit 4 |
LCDD19 | (AT91C_PB24_LCDD19 ) | PIOB Periph: B Bit: 24 | LCD Data Bus Bit 19 |
LCDD5 | (AT91C_PB10_LCDD5 ) | PIOB Periph: A Bit: 10 | LCD Data Bus Bit 5 |
LCDD6 | (AT91C_PB11_LCDD6 ) | PIOB Periph: A Bit: 11 | LCD Data Bus Bit 6 |
LCDDOTCK | (AT91C_PB2_LCDDOTCK) | PIOB Periph: A Bit: 2 | LCD Dot Clock |
LCDD7 | (AT91C_PB12_LCDD7 ) | PIOB Periph: A Bit: 12 | LCD Data Bus Bit 7 |
LCDHSYNC | (AT91C_PB1_LCDHSYNC) | PIOB Periph: A Bit: 1 | LCD Horizontal Synchronization |
LCDD8 | (AT91C_PB13_LCDD8 ) | PIOB Periph: A Bit: 13 | LCD Data Bus Bit 8 |
LCDD9 | (AT91C_PB14_LCDD9 ) | PIOB Periph: A Bit: 14 | LCD Data Bus Bit 9 |
Function | Description |
---|---|
AT91F_LCDC_CfgPMC | Enable Peripheral clock in PMC for LCDC |
AT91F_LCDC_CfgPIO | Configure PIO controllers to drive LCDC signals |
Signal | Symbol | PIO controller | Description |
---|---|---|---|
LCDD10 | (AT91C_PB10_LCDD10 ) | PIOB Periph: B Bit: 10 | LCD Data Bus Bit 10 |
LCDD11 | (AT91C_PB11_LCDD11 ) | PIOB Periph: B Bit: 11 | LCD Data Bus Bit 11 |
LCDD20 | (AT91C_PB17_LCDD20 ) | PIOB Periph: B Bit: 17 | LCD Data Bus Bit 20 |
LCDD12 | (AT91C_PB12_LCDD12 ) | PIOB Periph: B Bit: 12 | LCD Data Bus Bit 12 |
LCDD21 | (AT91C_PB18_LCDD21 ) | PIOB Periph: B Bit: 18 | LCD Data Bus Bit 21 |
LCDD13 | (AT91C_PB13_LCDD13 ) | PIOB Periph: B Bit: 13 | LCD Data Bus Bit 13 |
LCDD22 | (AT91C_PB19_LCDD22 ) | PIOB Periph: B Bit: 19 | LCD Data Bus Bit 22 |
LCDD14 | (AT91C_PB14_LCDD14 ) | PIOB Periph: B Bit: 14 | LCD Data Bus Bit 14 |
LCDD23 | (AT91C_PB20_LCDD23 ) | PIOB Periph: B Bit: 20 | LCD Data Bus Bit 23 |
LCDD15 | (AT91C_PB15_LCDD15 ) | PIOB Periph: B Bit: 15 | LCD Data Bus Bit 15 |
LCDD3 | (AT91C_PB5_LCDD3 ) | PIOB Periph: B Bit: 5 | LCD Data Bus Bit 3 |
LCDD19 | (AT91C_PB16_LCDD19 ) | PIOB Periph: B Bit: 16 | LCD Data Bus Bit 19 |
LCDD4 | (AT91C_PB6_LCDD4 ) | PIOB Periph: B Bit: 6 | LCD Data Bus Bit 4 |
LCDD5 | (AT91C_PB7_LCDD5 ) | PIOB Periph: B Bit: 7 | LCD Data Bus Bit 5 |
LCDD6 | (AT91C_PB8_LCDD6 ) | PIOB Periph: B Bit: 8 | LCD Data Bus Bit 6 |
LCDD7 | (AT91C_PB9_LCDD7 ) | PIOB Periph: B Bit: 9 | LCD Data Bus Bit 7 |
Function | Description |
---|---|
AT91F_LCDC_16B_TFT_CfgPIO | Configure PIO controllers to drive LCDC_16B_TFT signals |
Offset | Field | Description |
---|---|---|
0x0 | LCDC_BA1 (LCDC_BA) | DMA Base Address Register 1 |
0x4 | LCDC_BA2 (LCDC_BA) | DMA Base Address Register 2 |
0x8 | LCDC_FRMP1 | DMA Frame Pointer Register 1 |
0xC | LCDC_FRMP2 | DMA Frame Pointer Register 2 |
0x10 | LCDC_FRMA1 (LCDC_FRMA) | DMA Frame Address Register 1 |
0x14 | LCDC_FRMA2 (LCDC_FRMA) | DMA Frame Address Register 2 |
0x18 | LCDC_FRMCFG | DMA Frame Configuration Register |
0x1C | LCDC_DMACON | DMA Control Register |
0x20 | LCDC_DMA2DCFG | DMA 2D addressing configuration |
0x800 | LCDC_LCDCON1 | LCD Control 1 Register |
0x804 | LCDC_LCDCON2 | LCD Control 2 Register |
0x808 | LCDC_TIM1 | LCD Timing Config 1 Register |
0x80C | LCDC_TIM2 | LCD Timing Config 2 Register |
0x810 | LCDC_LCDFRCFG | LCD Frame Config Register |
0x814 | LCDC_FIFO | LCD FIFO Register |
0x818 | LCDC_MVAL | LCD Mode Toggle Rate Value Register |
0x81C | LCDC_DP1_2 | Dithering Pattern DP1_2 Register |
0x820 | LCDC_DP4_7 | Dithering Pattern DP4_7 Register |
0x824 | LCDC_DP3_5 | Dithering Pattern DP3_5 Register |
0x828 | LCDC_DP2_3 | Dithering Pattern DP2_3 Register |
0x82C | LCDC_DP5_7 | Dithering Pattern DP5_7 Register |
0x830 | LCDC_DP3_4 | Dithering Pattern DP3_4 Register |
0x834 | LCDC_DP4_5 | Dithering Pattern DP4_5 Register |
0x838 | LCDC_DP6_7 | Dithering Pattern DP6_7 Register |
0x83C | LCDC_PWRCON | Power Control Register |
0x840 | LCDC_CTRSTCON | Contrast Control Register |
0x844 | LCDC_CTRSTVAL | Contrast Value Register |
0x848 | LCDC_IER | Interrupt Enable Register |
0x84C | LCDC_IDR | Interrupt Disable Register |
0x850 | LCDC_IMR | Interrupt Mask Register |
0x854 | LCDC_ISR | Interrupt Enable Register |
0x858 | LCDC_ICR | Interrupt Clear Register |
0x85C | LCDC_GPR | General Purpose Register |
0x860 | LCDC_ITR | Interrupts Test Register |
0x864 | LCDC_IRR | Interrupts Raw Status Register |
0xC00 | LCDC_LUT_ENTRY[256] (LCDC_LUT_ENTRY) | LUT Entries Register |
Function | Description |
---|---|
AT91F_LCDC_CORE_CfgPMC | Enable LCD Controller Clock |
AT91F_LCDC_DMA_CfgPMC | Enable DMA Clock |
Offset | Name | Description |
---|---|---|
21..0 | LCDC_FRMPT1 AT91C_LCDC_FRMPT1 | Frame Pointer Address 1 |
Offset | Name | Description |
---|---|---|
20..0 | LCDC_FRMPT2 AT91C_LCDC_FRMPT2 | Frame Pointer Address 2 |
Offset | Name | Description |
---|---|---|
21..0 | LCDC_FRSIZE AT91C_LCDC_FRSIZE | FRAME SIZE |
27..24 | LCDC_BLENGTH AT91C_LCDC_BLENGTH | BURST LENGTH |
Offset | Name | Description |
---|---|---|
0 | LCDC_DMAEN AT91C_LCDC_DMAEN | DAM Enable 1: DMA is enable. 0: DMA is disable |
1 | LCDC_DMARST AT91C_LCDC_DMARST | DMA Reset (WO) 1: DMA is Reset. |
2 | LCDC_DMABUSY AT91C_LCDC_DMABUSY | DMA Reset (WO) 1: DMA is Busy. 0: DMA is Idle |
Offset | Name | Description |
---|---|---|
15..0 | LCDC_ADDRINC AT91C_LCDC_ADDRINC | Number of 32b words that the DMA must jump when going to the next line |
28..24 | LCDC_PIXELOFF AT91C_LCDC_PIXELOFF | Offset (in bits) of the first pixel of the screen in the memory word which contain it |
Offset | Name | Description |
---|---|---|
0 | LCDC_BYPASS AT91C_LCDC_BYPASS | Bypass lcd_pccklk divider 1: lcd_pccklk divider is bypassed. 0: lcd_pccklk divider is enable |
20..12 | LCDC_CLKVAL AT91C_LCDC_CLKVAL | 9-bit Divider for pixel clock frequency lcd_pccklk = system_clk/(2*CLKVAL) |
31..21 | LCDC_LINCNT AT91C_LCDC_LINCNT | Line Counter (RO) Down count from LINEVAL to 0 |
Offset | Name | Description | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1..0 | LCDC_DISTYPE AT91C_LCDC_DISTYPE | Display Type STN Mono, STN Color, TFT
| |||||||||||||||||||||
2 | LCDC_SCANMOD AT91C_LCDC_SCANMOD | Scan Mode Single Scan or Dual Scan
| |||||||||||||||||||||
4..3 | LCDC_IFWIDTH AT91C_LCDC_IFWIDTH | Interface Width 4, 8 or 16 Bits
| |||||||||||||||||||||
7..5 | LCDC_PIXELSIZE AT91C_LCDC_PIXELSIZE | Bits per pixel 1, 2, 4, 8, 16 or 24 Bits
| |||||||||||||||||||||
8 | LCDC_INVVD AT91C_LCDC_INVVD | lcd datas polarity Normal or Inverted
| |||||||||||||||||||||
9 | LCDC_INVFRAME AT91C_LCDC_INVFRAME | lcd vsync polarity Normal or Inverted
| |||||||||||||||||||||
10 | LCDC_INVLINE AT91C_LCDC_INVLINE | lcd hsync polarity Normal or Inverted
| |||||||||||||||||||||
11 | LCDC_INVCLK AT91C_LCDC_INVCLK | lcd pclk polarity Normal or Inverted
| |||||||||||||||||||||
12 | LCDC_INVDVAL AT91C_LCDC_INVDVAL | lcd dval polarity Normal or Inverted
| |||||||||||||||||||||
15 | LCDC_CLKMOD AT91C_LCDC_CLKMOD | lcd pclk Mode 0: Active during display period. 1: Always active.
| |||||||||||||||||||||
31 | LCDC_MEMOR AT91C_LCDC_MEMOR | lcd pclk Mode 0: Big Endian. 1: Little Endian.
|
Offset | Name | Description |
---|---|---|
7..0 | LCDC_VFP AT91C_LCDC_VFP | Vertical Front Porch |
15..8 | LCDC_VBP AT91C_LCDC_VBP | Vertical Back Porch |
21..16 | LCDC_VPW AT91C_LCDC_VPW | Vertical Synchronization Pulse Width |
27..24 | LCDC_VHDLY AT91C_LCDC_VHDLY | Vertical to Horizontal Delay |
Offset | Name | Description |
---|---|---|
7..0 | LCDC_HBP AT91C_LCDC_HBP | Horizontal Back Porch |
13..8 | LCDC_HPW AT91C_LCDC_HPW | Horizontal Synchronization Pulse Width |
31..22 | LCDC_HFP AT91C_LCDC_HFP | Horizontal Front Porch |
Offset | Name | Description |
---|---|---|
10..0 | LCDC_LINEVAL AT91C_LCDC_LINEVAL | Vertical Size of LCD Module |
31..21 | LCDC_HOZVAL AT91C_LCDC_HOZVAL | Horizontal Size of LCD Module |
Offset | Name | Description |
---|---|---|
15..0 | LCDC_FIFOTH AT91C_LCDC_FIFOTH | FIFO Threshold |
Offset | Name | Description | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
7..0 | LCDC_MVALUE AT91C_LCDC_MVALUE | Toggle Rate Value | |||||||||
31 | LCDC_MMODE AT91C_LCDC_MMODE | Toggle Rate Sel 0: Each Frame. 1: Defined by MVAL
|
Offset | Name | Description |
---|---|---|
7..0 | LCDC_DP1_2_FIELD AT91C_LCDC_DP1_2_FIELD | Ratio |
Offset | Name | Description |
---|---|---|
27..0 | LCDC_DP4_7_FIELD AT91C_LCDC_DP4_7_FIELD | Ratio |
Offset | Name | Description |
---|---|---|
19..0 | LCDC_DP3_5_FIELD AT91C_LCDC_DP3_5_FIELD | Ratio |
Offset | Name | Description |
---|---|---|
11..0 | LCDC_DP2_3_FIELD AT91C_LCDC_DP2_3_FIELD | Ratio |
Offset | Name | Description |
---|---|---|
27..0 | LCDC_DP5_7_FIELD AT91C_LCDC_DP5_7_FIELD | Ratio |
Offset | Name | Description |
---|---|---|
15..0 | LCDC_DP3_4_FIELD AT91C_LCDC_DP3_4_FIELD | Ratio |
Offset | Name | Description |
---|---|---|
19..0 | LCDC_DP4_5_FIELD AT91C_LCDC_DP4_5_FIELD | Ratio |
Offset | Name | Description |
---|---|---|
27..0 | LCDC_DP6_7_FIELD AT91C_LCDC_DP6_7_FIELD | Ratio |
Offset | Name | Description | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
0 | LCDC_PWR AT91C_LCDC_PWR | LCD Module Power Control | |||||||||
7..1 | LCDC_GUARDT AT91C_LCDC_GUARDT | Delay in Frame Period | |||||||||
31 | LCDC_BUSY AT91C_LCDC_BUSY | Read Only : 1 indicates that LCDC is busy
|
Offset | Name | Description | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1..0 | LCDC_PS AT91C_LCDC_PS | LCD Contrast Counter Prescaler
| |||||||||||||||
2 | LCDC_POL AT91C_LCDC_POL | Polarity of output Pulse
| |||||||||||||||
3 | LCDC_ENA AT91C_LCDC_ENA | PWM generator Control
|
Offset | Name | Description |
---|---|---|
7..0 | LCDC_CVAL AT91C_LCDC_CVAL | PWM Compare Value |
Offset | Name | Description |
---|---|---|
0 | LCDC_LNI AT91C_LCDC_LNI | Line Interrupt |
1 | LCDC_LSTLNI AT91C_LCDC_LSTLNI | Last Line Interrupt |
2 | LCDC_EOFI AT91C_LCDC_EOFI | End Of Frame Interrupt |
4 | LCDC_UFLWI AT91C_LCDC_UFLWI | FIFO Underflow Interrupt |
5 | LCDC_OWRI AT91C_LCDC_OWRI | Over Write Interrupt |
6 | LCDC_MERI AT91C_LCDC_MERI | Memory Error Interrupt |
Offset | Name | Description |
---|---|---|
0 | LCDC_LNI AT91C_LCDC_LNI | Line Interrupt |
1 | LCDC_LSTLNI AT91C_LCDC_LSTLNI | Last Line Interrupt |
2 | LCDC_EOFI AT91C_LCDC_EOFI | End Of Frame Interrupt |
4 | LCDC_UFLWI AT91C_LCDC_UFLWI | FIFO Underflow Interrupt |
5 | LCDC_OWRI AT91C_LCDC_OWRI | Over Write Interrupt |
6 | LCDC_MERI AT91C_LCDC_MERI | Memory Error Interrupt |
Offset | Name | Description |
---|---|---|
0 | LCDC_LNI AT91C_LCDC_LNI | Line Interrupt |
1 | LCDC_LSTLNI AT91C_LCDC_LSTLNI | Last Line Interrupt |
2 | LCDC_EOFI AT91C_LCDC_EOFI | End Of Frame Interrupt |
4 | LCDC_UFLWI AT91C_LCDC_UFLWI | FIFO Underflow Interrupt |
5 | LCDC_OWRI AT91C_LCDC_OWRI | Over Write Interrupt |
6 | LCDC_MERI AT91C_LCDC_MERI | Memory Error Interrupt |
Offset | Name | Description |
---|---|---|
0 | LCDC_LNI AT91C_LCDC_LNI | Line Interrupt |
1 | LCDC_LSTLNI AT91C_LCDC_LSTLNI | Last Line Interrupt |
2 | LCDC_EOFI AT91C_LCDC_EOFI | End Of Frame Interrupt |
4 | LCDC_UFLWI AT91C_LCDC_UFLWI | FIFO Underflow Interrupt |
5 | LCDC_OWRI AT91C_LCDC_OWRI | Over Write Interrupt |
6 | LCDC_MERI AT91C_LCDC_MERI | Memory Error Interrupt |
Offset | Name | Description |
---|---|---|
0 | LCDC_LNI AT91C_LCDC_LNI | Line Interrupt |
1 | LCDC_LSTLNI AT91C_LCDC_LSTLNI | Last Line Interrupt |
2 | LCDC_EOFI AT91C_LCDC_EOFI | End Of Frame Interrupt |
4 | LCDC_UFLWI AT91C_LCDC_UFLWI | FIFO Underflow Interrupt |
5 | LCDC_OWRI AT91C_LCDC_OWRI | Over Write Interrupt |
6 | LCDC_MERI AT91C_LCDC_MERI | Memory Error Interrupt |
Offset | Name | Description |
---|---|---|
7..0 | LCDC_GPRBUS AT91C_LCDC_GPRBUS | 8 bits available |
Offset | Name | Description |
---|---|---|
0 | LCDC_LNI AT91C_LCDC_LNI | Line Interrupt |
1 | LCDC_LSTLNI AT91C_LCDC_LSTLNI | Last Line Interrupt |
2 | LCDC_EOFI AT91C_LCDC_EOFI | End Of Frame Interrupt |
4 | LCDC_UFLWI AT91C_LCDC_UFLWI | FIFO Underflow Interrupt |
5 | LCDC_OWRI AT91C_LCDC_OWRI | Over Write Interrupt |
6 | LCDC_MERI AT91C_LCDC_MERI | Memory Error Interrupt |
Offset | Name | Description |
---|---|---|
0 | LCDC_LNI AT91C_LCDC_LNI | Line Interrupt |
1 | LCDC_LSTLNI AT91C_LCDC_LSTLNI | Last Line Interrupt |
2 | LCDC_EOFI AT91C_LCDC_EOFI | End Of Frame Interrupt |
4 | LCDC_UFLWI AT91C_LCDC_UFLWI | FIFO Underflow Interrupt |
5 | LCDC_OWRI AT91C_LCDC_OWRI | Over Write Interrupt |
6 | LCDC_MERI AT91C_LCDC_MERI | Memory Error Interrupt |