chip northbridge/amd/amdk8/root_complex device pci_domain 0 on chip northbridge/amd/amdk8 # mc device pci 18.0 on end # LDT 0 device pci 18.0 on end # LDT1 device pci 18.0 on # LDT2 chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on end device pci 0.1 on end device pci 1.0 on end device pci 1.1 on end end chip southbridge/amd/amd8111 # this "device pci 0.0" is the parent the next one # PCI bridge device pci 0.0 on device pci 0.0 on end device pci 0.1 on end device pci 0.2 on end device pci 1.0 off end end device pci 1.0 on chip superio/winbond/w83627hf device pnp 2e.0 on # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 drq 0x74 = 2 end device pnp 2e.1 off # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 end device pnp 2e.2 on # Com 1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.3 off # Com 2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.5 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 end device pnp 2e.6 off end # CIR device pnp 2e.7 off end # GAM_MIDI_GIPO1 device pnp 2e.8 off end # GPIO2 device pnp 2e.9 off end # GPIO3 device pnp 2e.a off end # ACPI device pnp 2e.b on # HW Monitor io 0x60 = 0x290 end end end device pci 1.1 on end device pci 1.2 on end device pci 1.3 on end device pci 1.5 off end device pci 1.6 off end register "ide0_enable" = "1" register "ide1_enable" = "1" end end # device pci 18.0 device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end end chip northbridge/amd/amdk8 device pci 19.0 on end device pci 19.0 on end device pci 19.0 on end device pci 19.1 on end device pci 19.2 on end device pci 19.3 on end end end device apic_cluster 0 on chip cpu/amd/socket_940 device apic 0 on end end chip cpu/amd/socket_940 device apic 1 on end end end end